Initial scaffold: Turborepo monorepo + design wiki

Turborepo (pnpm workspaces) with all dependencies pinned to latest
mutually-compatible versions: turbo 2.9, TypeScript 6, Fastify 5,
React 19, Vite 8, better-sqlite3 12 + Drizzle ORM 0.45.

Layout:
- apps/server   Fastify backend (local JWT auth + role guard, /health)
- apps/web      React 19 + Vite 8 operator SPA
- packages/db   Drizzle schema on SQLite/WAL; append-only events + users
- packages/devices  reader/printer/relay adapter interfaces (intent-only relay)
- packages/shared   shared domain types

Architecture constraints from the design wiki are encoded in the scaffold:
append-only hash-chained + signed event log, device-agnostic adapters,
"a barrier is not a door" (relay expresses intent only), fully-local
offline-first auth.

wiki/ is an LLM-maintained Obsidian knowledge base (28 pages) ingested
from the architecture & design notes, with its own maintenance schema.

Verified: pnpm install, full turbo build (5/5), server boots and serves
/health, drizzle-kit generates the initial migration.

wiki/entities/esp32-custom-controller.md

@@ -0,0 +1,41 @@
+---
+type: entity
+tags: [parking, hardware, access-control, upgrade-path]
+sources: [parking-system-architecture]
+updated: 2026-06-14
+---
+
+# Custom ESP32 Controller (prevention alternative)
+
+A small custom controller for **device-level authentication** — a control path that holds even
+against an attacker on the wire. The prevention-grade upgrade from the [[uhppote-controller]]
+(which is only tamper-*evident*). It moves the [[trust-boundary]] to the device. (See
+[[parking-system-architecture]] §7.)
+
+## Requirement reframed
+
+The threat is **forged or replayed commands**, not eavesdropping ("open lane 2" isn't secret).
+So the essential requirement is **authenticity + freshness (anti-replay)**; encryption is
+optional defence-in-depth. This is implemented as [[challenge-response-auth]].
+
+## Hardware
+
+- **Olimex ESP32-POE** (wired Ethernet + PoE, open-source hardware) or **ESP32-S3 + W5500**.
+- **[[atecc608]]** secure element holding the key(s), generated on-chip, non-extractable.
+- **Opto-isolated relay** between GPIO and the barrier operator's dry-contact open input.
+- Enable **ESP32 flash encryption + secure boot** regardless.
+- Transport: Ethernet (one network paradigm on the managed switch), or **RS-485** multidrop for
+  long/noisy runs.
+
+## Safety — treat as seriously as the crypto
+
+Governed by [[fail-state-safety]]: **entry fails closed, exit fails open**, a **hardware manual
+override** (key switch) that works with the ESP32 dead, a watchdog with a safe default, and the
+barrier operator still owns physical safety ([[barrier-not-a-door]]).
+
+## Trade-offs
+
+You take on firmware reliability, EMC/surge protection (TVS diodes, isolation, grounding,
+Ethernet surge arrestor outdoors), and field maintenance. Mitigate by keeping firmware **tiny
+and auditable**: verify a signed fresh command, pulse a relay, watchdog + safe state, nothing
+more. All parking logic stays on the host.